In this eCADSTAR demonstration, we are going to look at basic configurations and routing of differential pairs in the PCB Editor.
First of all we open our constraint browser, then I click on the create multiple differential pairs icon. This scans both Enets and net lists for matching names with a differentiating suffix which you can also customize here.
You can use nets or Enets as your target object for example if you have passive components in between your differential pairs you will use the nets as the target object instead.
The constraint browser automatically assigns a name using your net or Enet names.
I now need to assign a rule stack to them. This is one I have configured earlier so I am going to assign this rule stack and we will have a look and see how I have set this up.
In my differential pair rule-stack, you can see I have defined track widths and spacings. I now select calculate differential impedance, then using my track widths, spacings and PCB material stack up the embedded field solver returns the expect impedance and delay values. The calculation feature to the left of this incorporates the use of a target impedance for more complex designs.
Now with our rules defined let’s see how this affects our routing environment. When selecting one of the nets it automatically picks up the second one and routes them both at the same time, whilst adhering to the rule stacks we defined earlier.
On the approach to the final connection, you can see a directional arrow. This is indicating that my nets are crossed and it would be better to approach from the opposing side.
Let’s repeat that again with another differential pair.
And that’s how you set up and route basic differential pairs with the useful features in eCADSTAR.
More about eCADSTAR
eCADSTAR brings together the latest advances in collaboration and connected engineering in a borderless electronic design environment, connecting the engineering desktop with comprehensive design and manufacturing services.
In the 2020 Release
SIGNAL INTEGRITY | Add sophisticated Signal Integrity Analysis capabilities to eCADSTAR. Simulation in the Schematic (pre-layout SI) as well as in the PCB Layout (post-layout SI).
POWER INTEGRITY AND EMI | Embedded into eCADSTAR, these functions share the same design data and simulation library used for Signal Integrity.
IBIS-AMI | Analyse SERDES channels (e.g. PCI-Express Gen3+, HDMI, SATA, USB, etc.) based on IBIS-AMI models, S-Parameter characterisation of the channel, Eye diagram results, BER estimation and bath-tub curves and import IBIS-AMI devices into the simulation library.