CADSTAR Constraint Manager

As device switching speeds increase and supply voltages decrease, the need to route nets to meet tight timing and noise margins adds more pressure on the PCB design engineer to specify a wide range of design rules and constraints. The CADSTAR Constraint Manager provides a fast and effective way to entry even the most complex net constraints, using a familiar spreadsheet style interface, linked to both Schematic and PCB layout.

Design Fundamentals

Automated Net Conversion

Signal nets imported to Constraint Manager can be automatically converted to their Electrical equivalent, including passive devices, so that all constraints (e.g. maximum length, flight time or skew) are applied to the entire eNet. Power nets can also be automatically detected so that passives devices such as pull-up resistors and decoupling caps can be isolated from signal eNets.

Defining Groups and Differential Pairs

Focus on the core design flow by grouping critical nets into Class or Bus structures, then categorise those nets into sub-groups as required, e.g. separate the Byte Lanes and Control signals for a DDR2 data channel. Allocating differential pairs, creating skew groups and defining ‘family’ skew values takes just a couple of clicks.

Net Topology and Impedance Planning

Determine the pin order and structure of complex nets to ensure timing constraints can be achieved during layout.

Calculate impedance templates that pre-select track and gap sizes, then apply those templates to groups, differential pairs or individual nets as required. Tracks will then automatically be routed at the correct size in PREditor so that they meet your impedance objectives.

Compatibility

CADSTAR Constraint can interchange attribute data with CADSTAR Constraint Browser, CADSTAR Place&Route Editor S, CADSTAR Place&Route Editor HS, CADSTAR Signal Integrity Verify and CADSTAR Power Integrity Advance.