FPGA Analysis
As PCB designs become more intricate and complex, PCB designers are looking for technology which will enable them to create these more challenging designs and produce smaller and smaller boards.
FPGAs (field programmable gate arrays) are often incorporated into a design as a solution to an issue with space and the required technology for that space rather than as standard. However, their usage is becoming more widespread and as this continues, the idea that FPGA pinout can be optimised for both internal and external FPGA signal integrity ensures a level of flexibility in design that is not available with other similar technologies. This has a knock on effect throughout the rest of the design process and can prove to increase PCB yields and profit. Using FPGAs intelligently in terms of placement and routing in PCB design can increase fabrication yields which obviously has the desired effect, an increase in the end product’s profitability.
FPGA technology is an area which is subject to massive amounts of investment in research and development. This investment is being poured in to try to develop the technology in a way which ensures that the significant increase in pin count, which has occurred through the evolution of FPGAs, is combated as efficiently and cost effectively as possible. FPGAs do represent a significant increase in complexity of design, in particular in regard to a greater number of traces, vias and tighter tolerances as well as issues with signal integrity and timing constraints. Usage of FPGAs in PCB designs also means an increase in layers as the pin count has increased so there is greater need for space (layers) to distribute the routing of these pins.
Incorporating FPGAs into the PCB Design
The usage of FPGAs in PCB design is not always straight forward. PCB design obviously communicates through schematic data entry, however FPGAs speak in a language based system, most commonly VHDL or Verilog code. This difference, combined with human error seems to be the most challenging hurdle FPGAs have encountered so far.
This issue of separation between the PCB design and the FPGA only increases when it is passed to the design team. The team responsible for the programming and placement of the FPGA focus solely on the FPGA and ensuring that it has on board the correct technologies for its intended use in the design. The initial concern for the FPGA team is to ensure that the high level block diagrams are defined, and it is at this point that the logical function of the device is allocated, in most cases VHDL or Verilog code. The next step for the FPGA is for all the high speed signals, including the clocks to be defined and locked and then synthesised. Attention is then paid to the remaining signals which are assigned to physical pins using place and route software, creating a pin map file. This map file typically goes through several iterations before the pinout is optimised both physically and mechanically.
Once all this has been completed, only then is the design passed to the PCB design team, illustrating the void that exists between the FPGA team and the PCB designers. Now that the pin mapping is complete, the data is transferred to the librarian in the PCB team who defines it for usage within the design. This is commonly where errors can occur as this process is mostly done manually exposing the design to human error.
At this stage the FPGA device footprint is incorporated into the PCB design where it is prepared for placing and routing. This is where the PCB design is subject to comprehensive changes as the need for multiple layers to accommodate the complex pin map is realised.
It is at this stage of the design process that the flexibility of the FPGA pinout is really appreciated as it helps to optimise the signal integrity and timing of the PCB. The timing and signal integrity of the PCB often falls foul of the rift between the FPGA team and the PCB designers because the FPGA team, in an attempt to involve the PCB team, lock in the I/O pin assignments in the early stages of the design. This has a negative impact on the signal integrity and timing of the PCB and often leads to the FPGA pinouts having to be reconfigured and the PCB re-spun.
Streamlining the Design Process
When the development and implementation of an FPGA into a design is carried out by two different teams with different priorities, there are always going to be issues surrounding not only the communication between the two teams but also between the board and the device.
There are many way to increase the yield of a PCB, the two main and most common ones being, decreasing the number of layers and having fewer design iterations. Other well known ones are shortening traces – longer traces only demand more board space and increase the risk of cross talk, noise and signal coupling which inevitably compromises timing, and minimising the number and length of vias – vias create issues when faced with mechanical stresses and vibration.
Both design teams employ these tactics to reduce costs, however when the two processes are separated in a way such as this, inevitably the involvement of more heads can sometimes come at a point at which they have little or no influence over the design and are unable to contribute with any real impact. The effect of these two teams working separately is sometimes so severe that a routable board may not be able to be created, or the only option available to make the design and the FPGA work together is to add layers therefore increasing costs and reducing yields.
The lesson to be learnt is to include the PCB team earlier in the design process ensuring that the considerations and priorities of both teams are paramount from the start of the project. The way in which to achieve this is to employ a tool which is capable of integrating both design processes and which is able to rapidly translate design changes between both languages – schematics and VHDL/Verilog.
Integrating the Design Processes
Making the two processes into one integrated design process seems to be the logical way forward. What happens when the two processes are streamlined is that the communication and level of information held by both the FPGA development team and the PCB team is vastly increased, design iterations are reduced and a board is created which fulfils or surpasses the function it was design for.
With the old design process, any changes that needed to be made to the FPGA were only noticed when the device was passed to the PCB team. With an integrated design process, as issues become apparent they are dealt with. So, the schematic is revised as each definition from the FPGA is learned. The schematic may have all the pins assigned, or only the critical pins but the important issue here is that as this changes and the pins become assigned, the schematic learns this and updates. The PCB also updates itself with any electrical or mechanical issues that arise from the development of the FPGA. It’s obvious the effect this will have on the design process as the PCB evolves with all devices and design components speaking to each other.
The decrease in errors is also a major factor. As more and more information is updated automatically, and with the input of both the FPGA and PCB team there are far fewer opportunities for human errors. This is particularly apparent in the process of defining pins as there is a great opportunity for errors to creep in when this process is completed manually.
This process is not one way, as the PCB schematic updates with any changes made to the FPGA device, so too the FPGA updates with any changes to the PCB design. This kind of integration and feeding back and forward of information ensures that not only is the FPGA optimised but also the PCB is fully optimised, trace lengths are minimised which has the knock on effect of via number and lengths being reduced. FPGAs also shine when it comes to optimising external connections as it is flexible enough to be able to adapt accordingly.
The Future of FPGA
Without a doubt, the usage of FPGAs in PCB design is only set to increase and make designs more complex and sophisticated. Increased pin count and pin pitch on FPGAs will also continue and the development of PCB design will very much be dictated by design complexity and the need for smarter and more intelligent designs. As these factors begin to have a knock on effect in design departments worldwide, the need for an integrated PCB and FPGA design process will become ever more apparent.
Software development is innovation led and so there is of course a range of FPGA integration softwares on the market. CADSTAR FPGA is arguably one of the best when it comes to FPGA integration and design.
CADSTAR FPGA
CADSTAR FPGA offers tooling engineers the latest technology to apply FPGAs with the minimum of effort and therefore enables designers to:
• Bring products to the market faster
• Make easy changes to the designs late into the design cycle
• Explore new manufacturing and assembly efficiencies
• Enhance product quality
CADSTAR FPGA’s full focus is on the integration of the FPGA design in the PCB layout so that the benefits of FPGA designs can finally be fully appreciated.
• Forward and back annotation of Pin-swaps made in PCB design as in the FPGA design
• Optimised routing patterns
• Vendor neutral single environment FPGA design and verification
• Single and mixed language simulation
• One integrated design flow for FPGA and PCB
• Comprehensive documenting capabilities
• IEEE language standard